1. Technical Field
The present invention is directed to an apparatus and method for creating instruction bundles in an explicitly parallel architectures. More particularly, the present invention is directed to an apparatus and method for creating instruction bundles for the IA64 architecture.
2. Description of Related Art
Explicitly parallel architectures, such as IA64, require that instructions be organized into bundles comprising three instruction slots and a template field that identifies for each slot the execution unit type to which the instruction will be dispatched. Only a subset of instruction combinations are valid.
Because dynamic compilers, such as Just-In-Time compilers, typically compile methods as they are invoked, compile time is a direct contributor to response time and therefore, should be minimized. At the same time, the type of bundles selected have a direct effect on the execution time of the compiled method.
Thus, it would be beneficial to have an apparatus and method for quickly creating instruction bundles that will maximize instruction level parallelism and thereby optimize performance of the compiled method.